/*************************************************************************
Title........ fpga.h
Date......... Thu Feb  3 11:04:55  2000
Author....... J.M.Tarrant
/************************************************************************/
/****	Defines */

#define FPGA_SIG		0x01						/* value of ident byte */
													/* read @FPGA_ID */
#define FPGA_REG_BASE	(FPGA_BASE+0x00)			/* FPGA registers base */
#define FPGA_IO_BASE    (FPGA_BASE+0x20)			/* FPGA I/O base */

//	Offsets from FPGA_REG_BASE
#define FPGA_ID		(BYTE*)(FPGA_REG_BASE + 0x01)	/* read FPGA ID byte */
#define XCRA		(BYTE*)(FPGA_REG_BASE + 0x00)	/* FPGA Control Reg A */
#define XMPX		(BYTE*)(FPGA_REG_BASE + 0x01)	/* Multiplex Control Reg */
#define XDRA		(BYTE*)(FPGA_REG_BASE + 0x02)	/* data, pins FPGA0-6 */
#define XDRB		(BYTE*)(FPGA_REG_BASE + 0x03)	/* data, pins FPGA0-6 */
#define XDDRA		(BYTE*)(FPGA_REG_BASE + 0x04)	/* data dir, FPGA0-6 */
#define XDDRB		(BYTE*)(FPGA_REG_BASE + 0x05)	/* data dir, FPGA8-14*/
#define SFXR1		(BYTE*)(FPGA_REG_BASE + 0x06)	/* SFX Ch 1 byte */
#define SFXR2		(BYTE*)(FPGA_REG_BASE + 0x07)	/* SFX Ch 2 byte */

#define XSEC		(BYTE*)(FPGA_REG_BASE + 0x07)	/* Security Byte */


//	Offsets from FPGA_IO_BASE
#define AUX_BASE	(FPGA_IO_BASE+0x10)   			/* Base Of Aux Outputs */
#define AUX0		(BYTE*)(AUX_BASE+0x00)			/* AUX0 Output */
#define AUX1		(BYTE*)(AUX_BASE+0x01)			/* AUX1 Output */
#define AUX2		(BYTE*)(AUX_BASE+0x02)			/* AUX2 Output */
#define AUX3		(BYTE*)(AUX_BASE+0x03)			/* AUX3 Output */
#define AUX4		(BYTE*)(AUX_BASE+0x04)			/* AUX4 Output */
#define AUX5		(BYTE*)(AUX_BASE+0x05)			/* AUX5 Output */
#define AUX6		(BYTE*)(AUX_BASE+0x06)			/* AUX6/EXT SCL Output */
#define AUX7		(BYTE*)(AUX_BASE+0x07)			/* AUX7/EXT SDA Output */

#define OUTPUTS		(BYTE*)(FPGA_IO_BASE)			/* base of outputs */
#define INPUTS		(BYTE*)(FPGA_IO_BASE)			/* base of inputs */

// Chip select registers
#define	CSAM0 	0x00FFFFF5
#define	CSBAR0	0x00000009
#define	CSAM1	0x00FFFFF5
#define	CSBAR1	0x01000001
#define	CSAM2	0x00FFFFFF
#define	CSBAR2	0x02000003
#define	CSAM3	0x00FFFFFF
#define	CSBAR3	0x03000001

/****	Type Definitions */
/****	Prototypes */
	#include	"fpga.p"
/*************************************************************************/
