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00034 #ifndef AXIS_HARDWARE_H
00035 #define AXIS_HARDWARE_H
00036 #ifndef _LINUX_KERNEL_H
00037
00038 #include <linux/kernel.h>
00039 #include <linux/sched.h>
00040 #include <linux/version.h>
00041 #include <linux/module.h>
00042 #include <linux/proc_fs.h>
00043 #include <linux/delay.h>
00044 #include <linux/pci.h>
00045 #include <linux/list.h>
00046 #include <linux/ioport.h>
00047 #include <linux/serial.h>
00048 #include <linux/interrupt.h>
00049 #include <linux/string.h>
00050 #include <linux/spinlock.h>
00051 #include <linux/mtd/mtd.h>
00052 #include <linux/crypto.h>
00053 #include <asm/uaccess.h>
00054
00055 #endif //_LINUX_KERNEL_H
00056
00058 #define AXIS_PCI_VENDOR_ID 0x10b5
00059
00060 #define AXIS_PCI_DEVICE_ID 0x3001
00061
00063 #define PLX_MEMORY_CONTROL_REGION 0
00064
00066 #define PLX_IO_CONTROL_REGION 1
00067
00069 #define STATIC_RAM_REGION 2
00070
00071 #define IO_REGION 3
00072
00073 #define CONTROL_REGION 4
00074
00076 #define CONTROL_OFFSET 0x800
00077
00078 #define MAX_REGION 6
00079
00080 #define MAX_AXIS_ROUTED_SERIAL_PORTS 4
00081
00082 #define AXIS_MAX_UARTS 8
00083 #ifndef FALSE
00084 #define FALSE (0)
00085 #endif
00086
00087 #ifndef TRUE
00088 #define TRUE (1)
00089 #endif
00090
00091 #define INTERRUPT_CONTROL_REGISTER 0x4c
00092 #define INTERRUPT_SETUP 0x041
00093
00094 #define TYPE(dev) (MINOR(dev)>>4)
00095
00096 #define NUM(dev) (MINOR(dev)>>2 &0x3)
00097
00098 #define SUB_NUM(dev) (MINOR(dev) &0x3)
00099
00101 #define MAX_AXIS_REGIONS 5
00102
00103
00105 #define UART_0_INTERRUPT_MASK_BITS ((1<<0)|(1<<1)|(1<<2)|(1<<3)) //Four interrupts for Quad UART 0
00106
00107 #define UART_1_INTERRUPT_MASK_BITS ((1<<4)|(1<<5)|(1<<6)|(1<<7)) //Four interrupts for Quad UART 1
00108
00109 #define DESA_INTERRUPT_BIT (1<<8)
00110
00111 #define DESB_INTERRUPT_BIT (1<<9)
00112
00113 #define DESC_INTERRUPT_BIT (1<<10)
00114
00115 #define DESD_INTERRUPT_BIT (1<<11)
00116
00118 #define SPI_INTERRUPT (1<<12)
00119
00120 #define INPUTS_INTERRUPT (1<<13)
00121
00122 #define OUTPUTS_INTERRUPT (1<<14)
00123 #define SECURITY_FAIL_INTERRUPT (1<<15)
00124 #define SECURITY_PASS_INTERRUPT (1<<25)
00125 #define SECURITY_TIMEOUT_INTERRUPT (1<<26)
00126 #define SECURITY_INTERRUPTS (SECURITY_FAIL_INTERRUPT|SECURITY_PASS_INTERRUPT)
00127
00128 #define SPI_WRITE_INTERRUPT (1<<16)
00129 #define SPI_READ_INTERRUPT (1<<17)
00130
00131 #define SMART_RX_INTERRUPT (1<<20)
00132 #define SMART_TX_INTERRUPT (1<<21)
00133 #define SMART_FRAME_ERROR_INTERRUPT (1<<22)
00134 #define SMART_PARITY_ERROR_INTERRUPT (1<<23)
00135 #define PCI_TIMEOUT_INTERRUPT (1<<24)
00136
00137
00138 #define DES_INTERRUPT_BITS (DESA_INTERRUPT_BIT|DESB_INTERRUPT_BIT|DESC_INTERRUPT_BIT|DESD_INTERRUPT_BIT)
00139 #define UART_INTERRUPT_MASK_BITS (UART_0_INTERRUPT_MASK_BITS|UART_1_INTERRUPT_MASK_BITS)
00140
00141
00142 #define UART_ROUTE_REGISTER_OFFSET (0x10+CONTROL_OFFSET)
00143 #define AXIS_INTERRUPT_REGISTER (0x18+CONTROL_OFFSET)
00144 #define AXIS_INTERRUPT_MASK_REGISTER (0x1C+CONTROL_OFFSET)
00145 #define AXIS_SECURITY_TIMER_REGISTER (0x38+CONTROL_OFFSET)
00146 #define AXIS_SECURITY_TIMER_MASK 0xFFFF
00147 #define AXIS_ID_AND_ISSUE_REG (0xC+CONTROL_OFFSET)
00148 #define AXIS_ID_SHIFT 8
00149 #define AXIS_ID_MASK 0XFFFFFF
00150 #define AXIS_ISSUE_SHIFT 0
00151 #define AXIS_ISSUE_MASK 0XFF
00152
00153
00154
00155
00156 #define AXIS_MAX_SUB_DEVICES 40
00157
00158 struct axis_pci_device_entry;
00171 static inline void timeval_less_local( struct timeval a, struct timeval b, struct timeval * result )
00172 {
00173 if( a.tv_usec<b.tv_usec )
00174 {
00175 a.tv_sec--;
00176 a.tv_usec+= 1000000 ;
00177 }
00178 result->tv_sec=a.tv_sec-b.tv_sec ;
00179 result->tv_usec=a.tv_usec-b.tv_usec ;
00180 }
00181
00182 #endif //AXIS_HARDWARE_H
00183