axis.h File Reference

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Detailed Description

Provide definitions needed to use the Axis driver from user space.

Author:

Andrew Roca

This provides the definitions common to both user space axis clients and the axis kernel driver itself

#include <linux/ioctl.h>

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Data Structures
struct	_KEY_OP
	Contains a 3DES KEY passed by IOCTL call. More...
struct	_CRYPTO_OP
	User applications submit DES operations using this structure and an IOCTL call. More...
Defines
#define	SRAM_MAGIC   0xA0
	Picks a start number for IOCTLS.
#define	AXIS_SRAM_WRITE_ENABLE   (1<<0)
	AXIS_SRAM_WRITE_ENABLE If set SRAM writes will succees.
#define	AXIS_SRAM_READ_ENABLE   (1<<1)
	AXIS_SRAM_READ_ENABLE If set SRAM reads will succeed.
#define	AXIS_SRAM_PROTECTION   _IO(SRAM_MAGIC,0)
	AXIS_SRAM_PROTECTION Call to allow user space code to control SRAM read and write enables.
#define	SPI_MAGIC   0x90
	SPI_MAGIC Magic number to identify SPI IOCTL calls.
#define	SPI_CLK_DIV_2   0
	SPI_CLK_DIV_2 SPI bit clock is divided by 2.
#define	SPI_CLK_DIV_4   1
	SPI_CLK_DIV_4 SPI bit clock is divided by 4.
#define	SPI_CLK_DIV_8   2
	SPI_CLK_DIV_8 SPI bit clock is divided by 8.
#define	SPI_CLK_DIV_16   3
	SPI_CLK_DIV_16 SPI bit clock is divided by 16.
#define	SPI_CLK_DIV_32   4
	SPI_CLK_DIV_32 SPI bit clock is divided by 32.
#define	SPI_CLK_DIV_64   5
	SPI_CLK_DIV_64 SPI bit clock is divided by 64.
#define	SPI_CLK_DIV_128   6
	SPI_CLK_DIV_128 SPI bit clock is divided by 128.
#define	SPI_CLK_DIV_256   7
	SPI_CLK_DIV_256 SPI bit clock is divided by 256.
#define	SPI_LSB_FIRST   (1<<5)
	SPI_LSB_FIRST Sends SPI data out backwards LSB first.
#define	SPI_CLOCK_PHASE   (1<<4)
	SPI_CLOCK_PHASE SPI Alternative data clock phase relationship.
#define	SPI_CLOCK_POLARITY   (1<<3)
	SPI_CLOCK_POLARITY SPI invert the clock polarity.
#define	AXIS_SPI_SET   _IO(SPI_MAGIC,0)
	AXIS_SPI_SET Picks a start number for spi IOCTLS.
#define	AXIS_SPI_SET_MIN_INTERCHARACTER_TIME   _IO(SPI_MAGIC+1,0)
	AXIS_SPI_SET_MIN_INTERCHARACTER_TIME allow application to slow down the byte rate to the SPI to handle slow devices time, in useconds.
#define	SMART_MAGIC   0x82
	SMART_MAGIC Picks a start number for smart card IOCTLS.
#define	AXIS_SMART_ENABLE   _IO(SMART_MAGIC,0)
	AXIS_SMART_ENABLE allow control of smart card enable/clock line.
#define	AXIS_SMART_RESET   _IO(SMART_MAGIC+1,0)
	AXIS_SMART_RESET allow control of smart card reset line.
#define	AXIS_SMART_CARD_TIMEOUT   _IO(SMART_MAGIC+2,0)
	AXIS_SMART_RESET allow control of smart card rx timeout.
#define	AXIS_SMART_CARD_SET_MIN_INTERCHARACTER_TIME   _IO(SMART_MAGIC+2,0)
	AXIS_SMART_RESET allow control of intercharacter tx rate for smart card.
#define	USE_RAW_KEY   (1<<0)
	USE_RAW_KEY used to signal that the key as not been encrypted with the master key.
#define	DO_ENCRYPT   (1<<1)
	DO_ENCRYPT The 3DES system should encrpyt rather than decrypt any data it receives.
#define	USE_MASTER_KEY   (1<<2)
	USE_MASTER_KEY Any DES operations should the master key.
#define	DO_GET_SECURE_SEED   (1<<3)
	DO_READ_SECURITY_NONCE Get Security Seed Nonce.
#define	DO_WRITE_SECURE_SEED   (1<<4)
	DO_WRITE_SECURITY_NONCE Write Secure Seed Nonce.
#define	CRYPT_MAGIC   0x81
	CRYPT_MAGIC Picks a start number for IOCTLS.
#define	AXIS_CRYPT_OP   _IOWR(CRYPT_MAGIC,0,CRYPTO_OP)
	AXIS_CRYPT_OP defines a IOCTL code for user cryto-ops.
#define	AXIS_KEY_OP   _IOWR(CRYPT_MAGIC+1,0,CRYPTO_OP)
	AXIS_KEY_OP allows user to specify a key.
#define	AXIS_KEY_FLAGS_OP   _IO(CRYPT_MAGIC+2,0)
	AXIS_KEY_OP allows user to change a keys flags.
#define	AXIS_SECURE_OP   _IOWR(CRYPT_MAGIC+3,0,CRYPTO_OP)
	AXIS_CRYPT_OP defines a IOCTL code for user cryto-ops.
Typedefs
typedef _KEY_OP	KEY_OP
typedef _CRYPTO_OP	CRYPTO_OP

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Define Documentation

#define AXIS_CRYPT_OP   _IOWR(CRYPT_MAGIC,0,CRYPTO_OP)

AXIS_CRYPT_OP defines a IOCTL code for user cryto-ops.

#define AXIS_KEY_FLAGS_OP   _IO(CRYPT_MAGIC+2,0)

AXIS_KEY_OP allows user to change a keys flags.

#define AXIS_KEY_OP   _IOWR(CRYPT_MAGIC+1,0,CRYPTO_OP)

AXIS_KEY_OP allows user to specify a key.

#define AXIS_SECURE_OP   _IOWR(CRYPT_MAGIC+3,0,CRYPTO_OP)

AXIS_CRYPT_OP defines a IOCTL code for user cryto-ops.

#define AXIS_SMART_CARD_SET_MIN_INTERCHARACTER_TIME   _IO(SMART_MAGIC+2,0)

AXIS_SMART_RESET allow control of intercharacter tx rate for smart card.

#define AXIS_SMART_CARD_TIMEOUT   _IO(SMART_MAGIC+2,0)

AXIS_SMART_RESET allow control of smart card rx timeout.

#define AXIS_SMART_ENABLE   _IO(SMART_MAGIC,0)

AXIS_SMART_ENABLE allow control of smart card enable/clock line.

#define AXIS_SMART_RESET   _IO(SMART_MAGIC+1,0)

AXIS_SMART_RESET allow control of smart card reset line.

#define AXIS_SPI_SET   _IO(SPI_MAGIC,0)

AXIS_SPI_SET Picks a start number for spi IOCTLS.

#define AXIS_SPI_SET_MIN_INTERCHARACTER_TIME   _IO(SPI_MAGIC+1,0)

AXIS_SPI_SET_MIN_INTERCHARACTER_TIME allow application to slow down the byte rate to the SPI to handle slow devices time, in useconds.

#define AXIS_SRAM_PROTECTION   _IO(SRAM_MAGIC,0)

AXIS_SRAM_PROTECTION Call to allow user space code to control SRAM read and write enables.

#define AXIS_SRAM_READ_ENABLE   (1<<1)

AXIS_SRAM_READ_ENABLE If set SRAM reads will succeed.

#define AXIS_SRAM_WRITE_ENABLE   (1<<0)

AXIS_SRAM_WRITE_ENABLE If set SRAM writes will succees.

#define CRYPT_MAGIC   0x81

CRYPT_MAGIC Picks a start number for IOCTLS.

#define DO_ENCRYPT   (1<<1)

DO_ENCRYPT The 3DES system should encrpyt rather than decrypt any data it receives.

#define DO_GET_SECURE_SEED   (1<<3)

DO_READ_SECURITY_NONCE Get Security Seed Nonce.

#define DO_WRITE_SECURE_SEED   (1<<4)

DO_WRITE_SECURITY_NONCE Write Secure Seed Nonce.

#define SMART_MAGIC   0x82

SMART_MAGIC Picks a start number for smart card IOCTLS.

#define SPI_CLK_DIV_128   6

SPI_CLK_DIV_128 SPI bit clock is divided by 128.

#define SPI_CLK_DIV_16   3

SPI_CLK_DIV_16 SPI bit clock is divided by 16.

#define SPI_CLK_DIV_2   0

SPI_CLK_DIV_2 SPI bit clock is divided by 2.

#define SPI_CLK_DIV_256   7

SPI_CLK_DIV_256 SPI bit clock is divided by 256.

#define SPI_CLK_DIV_32   4

SPI_CLK_DIV_32 SPI bit clock is divided by 32.

#define SPI_CLK_DIV_4   1

SPI_CLK_DIV_4 SPI bit clock is divided by 4.

#define SPI_CLK_DIV_64   5

SPI_CLK_DIV_64 SPI bit clock is divided by 64.

#define SPI_CLK_DIV_8   2

SPI_CLK_DIV_8 SPI bit clock is divided by 8.

#define SPI_CLOCK_PHASE   (1<<4)

SPI_CLOCK_PHASE SPI Alternative data clock phase relationship.

#define SPI_CLOCK_POLARITY   (1<<3)

SPI_CLOCK_POLARITY SPI invert the clock polarity.

#define SPI_LSB_FIRST   (1<<5)

SPI_LSB_FIRST Sends SPI data out backwards LSB first.

#define SPI_MAGIC   0x90

SPI_MAGIC Magic number to identify SPI IOCTL calls.

#define SRAM_MAGIC   0xA0

Picks a start number for IOCTLS.

#define USE_MASTER_KEY   (1<<2)

USE_MASTER_KEY Any DES operations should the master key.

#define USE_RAW_KEY   (1<<0)

USE_RAW_KEY used to signal that the key as not been encrypted with the master key.

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Typedef Documentation

typedef struct _CRYPTO_OP CRYPTO_OP

typedef struct _KEY_OP KEY_OP

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